The present invention relates to a fuse box of a semiconductor device and a method for forming the same, and more particularly, to a fuse box of a semiconductor device that can prevent oxidation of a fuse metal due to external exposure and defects resulting therefrom, and a method for forming the same.
As is generally known in the art, a semiconductor device is manufactured through a fabrication procedure in which cells having integrated circuits are formed on a substrate made of silicon and through an assembly procedure in which the substrate formed with the cells is packaged at the chip level. The chips fabricated through the fabrication procedure undergo, before being packaged, an inspection process in which the electrical characteristics of the cells are inspected.
The inspection process is a process for inspecting whether the cells formed on the substrate are electrically complete or defective. Depending upon the inspection result a chip having defective cells is removed in advance before conducting the assembly procedure in order to conserve labor and assembly costs. Further, the inspection process is also conducted to repair the defective cells.
This repair process will be described below in detail. In general, in the manufacture of a semiconductor device, cells are redundantly formed so as to replace defective cells, and fuses are formed to connect the redundant cells to integrated circuits. The repair process is a process in which the defective cells discovered during the inspection process are connected to the redundant cells additionally formed in a chip using the fuses and are thereby repaired. In the repair process, as a blowing process is conducted, in which a portion of the fuse selected among the fuses formed in the fuse box is cut using a laser, positional information of cells to be repaired is determined.
Hereinbelow, a conventional method for forming a fuse box of a semiconductor device will be described with reference to FIGS. 1A through 1C.
Referring to FIG. 1A, lower patterns 102 are formed on a semiconductor substrate 101 as an etch stopper of when a plug is formed. A first interlayer dielectric 103 is formed on the semiconductor substrate 101 to cover the lower patterns 102.
Referring to FIG. 1B, a TiN layer 104a and 104b and a polysilicon layer 105a and 105b are sequentially deposited on the first interlayer dielectric 103. By etching the polysilicon layer 105a and 105b and the TiN layer 104a and 104b, a first metal fuse 106a and a second metal fuse 106b, which comprise stacks of the TiN layer 104a and 104b and the polysilicon layer 105a and 105b, are formed.
Referring to FIG. 1C, a second interlayer dielectric 107 is formed on the first interlayer dielectric 103 to cover the first and second metal fuses 106a and 106b. Plugs 108 are formed in the second interlayer dielectric 107 and the first interlayer dielectric 103 to pass through the lower patterns 102. At this time, the lower patterns 102 function as an etch stopper of when a plug is formed. Metal lines 109 are formed on the second interlayer dielectric 107 to be brought into contact with the plugs 108, as a result of which the fuse box is completely formed.
After the fuse box is formed in this way, the repair process including the blowing process, in which a portion of the fuse selected between the metal fuses 106a and 106b is cut using a laser, is conducted.
However, in the construction of the conventional fuse box as described above, as shown in FIG. 2A, after the blowing process for cutting a portion of the certain fuse is conducted, moisture leaks into the portions of the blown metal fuse 116a under the hot and humid conditions in which bias is applied to evaluate the reliability of the semiconductor device. As a consequence, the fuse metal portions, that is, the portions of the TiN layer, exposed to the outside, are oxidated. The reference numeral 114a designates the oxidated TiN layer.
Also, as shown in FIG. 2B, as the volume of the oxidated TiN layer 114a expands, cracks 110 occur at the interface between the first and second interlayer dielectrics 103 and 107. Due to the presence of these cracks, the TiN layer of the adjoining metal fuse 116b that is not blown is likely to be oxidated. The reference numeral 114b designates the oxidated TiN layer of the adjoining metal fuse 116b. 
Resultantly, as the TiN layer of the adjoining metal fuse 116b that is not blown is likely to be oxidated, the metal fuse 116b that is not blown can be erroneously recognized as if it is blown, and misoperation of the semiconductor device may be caused, whereby the reliability of the semiconductor device is degraded.